Add add

8 files changed, 136 insertions, 29 deletions

diff --git a/Makefile b/Makefile
index 463598f..e406833 100644
--- a/Makefile
+++ b/Makefile
@@ -47,9 +47,11 @@ endif
 PROGSRC=\
     asm/assembler.cpp \
     asm/chunk.cpp \
+    asm/intel64/add.cpp \
     asm/intel64/int.cpp \
     asm/intel64/nop.cpp \
     asm/intel64/ret.cpp \
+    asm/intel64/codes.cpp \
     asm/operators.cpp \
     asm/segment.cpp \
     bnf.cpp \
diff --git a/asm/assembler.h b/asm/assembler.h
index ddea4af..3d3e9a9 100644
--- a/asm/assembler.h
+++ b/asm/assembler.h
@@ -2,6 +2,8 @@
 
 #include "chunk.h"
 
+#include <boost/endian/conversion.hpp>
+
 #include <any>
 #include <functional>
 #include <iostream>
@@ -47,8 +49,44 @@ class Immediate8
 public:
  Immediate8(uint8_t value): m_value(value) {}
  uint8_t value() {return m_value;}
+ std::vector<uint8_t> getCode() {return {m_value};};
 
 private:
  uint8_t m_value;
 };
 
+class Immediate32
+{
+public:
+ Immediate32(uint32_t value): m_value(value) {}
+ uint32_t value() { return m_value; }
+ std::vector<uint8_t> getCode() {
+  std::vector<uint8_t> result(size_t(4));
+  *(reinterpret_cast<uint32_t*>(result.data())) = boost::endian::native_to_little(m_value);
+  return result;
+ };
+
+private:
+ uint32_t m_value;
+};
+
+class Register32
+{
+public:
+ Register32(const std::string& name): m_name(name) {}
+ std::string name() { return m_name; }
+
+private:
+ std::string m_name;
+};
+
+class Register64
+{
+public:
+ Register64(const std::string& name): m_name(name) {}
+ std::string name() { return m_name; }
+
+private:
+ std::string m_name;
+};
+
diff --git a/asm/intel64/add.cpp b/asm/intel64/add.cpp
new file mode 100644
index 0000000..dc5c704
--- /dev/null
+++ b/asm/intel64/add.cpp
@@ -0,0 +1,31 @@
+#include "add.h"
+
+#include "codes.h"
+
+#include <asm/assembler.h>
+#include <asm/operators.h>
+
+using namespace std::string_literals;
+
+Op_add::Op_add(AsmArgs& args)
+{
+ if (args[0].type() == typeid(Register32) && std::any_cast<Register32>(args[0]).name() == "eax" && args[1].type() == typeid(Immediate32)) { // add eax, imm32
+  machine_code = std::vector<uint8_t>{ 0x05 } + std::any_cast<Immediate32>(args[1]).getCode();
+ } else if (args[0].type() == typeid(Register64) && std::any_cast<Register64>(args[0]).name() == "rax"  && args[1].type() == typeid(Immediate32)) { // add rax, imm32
+  machine_code = REX("W") + std::vector<uint8_t>{ 0x05 } + std::any_cast<Immediate32>(args[1]).getCode();
+ } else {
+  throw std::runtime_error("Unimplemented: add "s + args[0].type().name() + " "s + args[1].type().name());
+ }
+}
+
+namespace {
+
+bool registered0 { registerOp(mangleName<Register32, Immediate32>("add"), [](AsmArgs& args) -> std::shared_ptr<Op>{
+                             return std::make_shared<Op_add>(args);
+                             }) };
+// TODO
+bool registered1 { registerOp(mangleName<Register64, Immediate32>("add"), [](AsmArgs& args) -> std::shared_ptr<Op>{
+                             return std::make_shared<Op_add>(args);
+                             }) };
+
+}
diff --git a/asm/intel64/add.h b/asm/intel64/add.h
new file mode 100644
index 0000000..4c6b589
--- /dev/null
+++ b/asm/intel64/add.h
@@ -0,0 +1,31 @@
+// Integer Addition
+
+#pragma once
+
+#include <asm/assembler.h>
+
+class Op_add: public Op
+{
+public:
+ Op_add(AsmArgs& args);
+
+public:
+ std::vector<uint8_t> getCode() override
+ {
+  return machine_code;
+ }
+
+ size_t size() override
+ {
+  return machine_code.size();
+ }
+
+ bool optimize() override ///< returns true if changed
+ {
+  return false;
+ }
+
+protected:
+ std::vector<uint8_t> machine_code;
+};
+
diff --git a/asm/intel64/codes.cpp b/asm/intel64/codes.cpp
new file mode 100644
index 0000000..a1d9e87
--- /dev/null
+++ b/asm/intel64/codes.cpp
@@ -0,0 +1,17 @@
+#include "codes.h"
+
+// REX prefix: 0b0100WRXB
+std::vector<uint8_t> REX(std::string s) {
+ uint8_t result{0b01000000};
+ if (s == "W")
+  result |= 0b00001000;
+ if (s == "R")
+  result |= 0b00000100;
+ if (s == "X")
+  result |= 0b00000010;
+ if (s == "B")
+  result |= 0b00000001;
+
+ return { result }; 
+}
+
diff --git a/asm/intel64/codes.h b/asm/intel64/codes.h
new file mode 100644
index 0000000..32eff1c
--- /dev/null
+++ b/asm/intel64/codes.h
@@ -0,0 +1,8 @@
+#pragma once
+
+#include <cstdint>
+#include <string>
+#include <vector>
+
+// REX prefix: 0b0100WRXB
+std::vector<uint8_t> REX(std::string s);
diff --git a/intel.cpp b/intel.cpp
index 9f24f1d..65b9f3f 100644
--- a/intel.cpp
+++ b/intel.cpp
@@ -22,21 +22,6 @@ using namespace std::placeholders;
 
 namespace {
 
- // REX prefix: 0b0100WRXB
- std::vector<uint8_t> REX(std::string s) {
-  uint8_t result{0b01000000};
-  if (s == "W")
-   result |= 0b00001000;
-  if (s == "R")
-   result |= 0b00000100;
-  if (s == "X")
-   result |= 0b00000010;
-  if (s == "B")
-   result |= 0b00000001;
-
-  return { result }; 
- }
-
  std::vector<uint8_t> imm8(std::string s) {
   long value{ std::stol(s) };
   uint8_t* bin = reinterpret_cast<uint8_t*>(&value);
@@ -138,20 +123,6 @@ namespace {
 
  std::unordered_map<std::string, std::function<InstructionCodeList(const std::vector<Token>&)>> ops_old{
 
-  // Integer Addition
-  {"add", [](const std::vector<Token>& sl) -> InstructionCodeList {
-   if (sl.size() == 3) {
-    if (sl[1].value == "eax") { // ADD EAX, imm32
-     return { { std::vector<uint8_t>{ 0x05 } +imm32(sl[2].value), {} } };
-    } else if (sl[1].value == "rax") { // ADD RAX, imm32
-     return { { REX("W") + std::vector<uint8_t>{ 0x05 } +imm32(sl[2].value), {} } };
-    }
-   }
-
-   // ... TODO
-   throw std::runtime_error("Unknown command: "s + sl[0].value);
-  }},
-
   // Call Procedure
   {"call",  std::bind(op_jmp, _1, OP_T{}, OP_T{ 0xE8 })},
 
diff --git a/test-asm.cpp b/test-asm.cpp
index 50e4112..d839683 100644
--- a/test-asm.cpp
+++ b/test-asm.cpp
@@ -37,6 +37,15 @@ protected:
  }
 };
 
+TEST_F(AsmTest, Intel64_add) {
+ Segment segment;
+ AsmArgs args{{Register32("eax"), Immediate32(1)}};
+ segment.push_back(makeOp("add", args));
+
+ ASSERT_EQ(segment.size(), 1);
+ ASSERT_EQ(segment.getCode(), std::vector<uint8_t>({0x05, 0x01, 0x00, 0x00, 0x00}));
+}
+
 TEST_F(AsmTest, Intel64_int_0) {
  Segment segment;
  AsmArgs args{{Immediate8(0)}};