From 1349c00b782eca3ea841bfa388301cb6fc908cc7 Mon Sep 17 00:00:00 2001
From: Roland Reichwein <mail@reichwein.it>
Date: Sun, 18 Oct 2020 20:39:56 +0200
Subject: Namespace Asm

---
 asm/intel64/add.cpp | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

(limited to 'asm/intel64/add.cpp')

diff --git a/asm/intel64/add.cpp b/asm/intel64/add.cpp
index 2de2219..106ffec 100644
--- a/asm/intel64/add.cpp
+++ b/asm/intel64/add.cpp
@@ -7,18 +7,18 @@
 
 using namespace std::string_literals;
 
-Op_add::Op_add(AsmArgs& args)
+Op_add::Op_add(Asm::Args& args)
 {
- if (args[0].type() == typeid(AsmArgs::Register32) &&
-     std::any_cast<AsmArgs::Register32>(args[0]).name() == "eax" &&
-     args[1].type() == typeid(AsmArgs::Immediate32))
+ if (args[0].type() == typeid(Asm::Args::Register32) &&
+     std::any_cast<Asm::Args::Register32>(args[0]).name() == "eax" &&
+     args[1].type() == typeid(Asm::Args::Immediate32))
  { // add eax, imm32
-  machine_code = std::vector<uint8_t>{ 0x05 } + std::any_cast<AsmArgs::Immediate32>(args[1]).getCode();
- } else if (args[0].type() == typeid(AsmArgs::Register64) &&
-            std::any_cast<AsmArgs::Register64>(args[0]).name() == "rax"  &&
-            args[1].type() == typeid(AsmArgs::Immediate32))
+  machine_code = std::vector<uint8_t>{ 0x05 } + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
+ } else if (args[0].type() == typeid(Asm::Args::Register64) &&
+            std::any_cast<Asm::Args::Register64>(args[0]).name() == "rax"  &&
+            args[1].type() == typeid(Asm::Args::Immediate32))
  { // add rax, imm32
-  machine_code = REX("W") + std::vector<uint8_t>{ 0x05 } + std::any_cast<AsmArgs::Immediate32>(args[1]).getCode();
+  machine_code = REX("W") + std::vector<uint8_t>{ 0x05 } + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
  } else {
   throw std::runtime_error("Unimplemented: add "s + args[0].type().name() + " "s + args[1].type().name());
  }
@@ -27,10 +27,10 @@ Op_add::Op_add(AsmArgs& args)
 namespace {
 
 bool registered {
- registerOp(mangleName<AsmArgs::Register32, AsmArgs::Immediate32>("add"), [](AsmArgs& args) -> std::shared_ptr<Op>{
+ registerOp(mangleName<Asm::Args::Register32, Asm::Args::Immediate32>("add"), [](Asm::Args& args) -> std::shared_ptr<Op>{
                              return std::make_shared<Op_add>(args);
                              }) &&
- registerOp(mangleName<AsmArgs::Register64, AsmArgs::Immediate32>("add"), [](AsmArgs& args) -> std::shared_ptr<Op>{
+ registerOp(mangleName<Asm::Args::Register64, Asm::Args::Immediate32>("add"), [](Asm::Args& args) -> std::shared_ptr<Op>{
                              return std::make_shared<Op_add>(args);
                              })
 };
-- 
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